Thiết kế DECODER 2 -> 4 có ngõ ra tích cực mức thấp,ngõ vào cho phép tích cực mức thấp

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1. #TRANHIEU9232

   library IEEE;
   use IEEE.STD_LOGIC_1164.ALL;
   use IEEE.STD_LOGIC_ARITH.ALL;
   use IEEE.STD_LOGIC_UNSIGNED.ALL;

   entity dientu_az is
   port ( I :  in STD_LOGIC_VECTOR(1 downto  0);
   E1, E2 : in STD_LOGIC;
   Q :  out STD_LOGIC_VECTOR(3  downto 0)
   );
   end dientu_az;

   architecture dientu_az of dientu_az is
   begin
   process (I, E1, E2)
   begin
   if (E1=’0′ or E2 = ‘1’) then Q <= “1111”;
   else
   case I is
    when “00” => Q <= “0111”;
     when “01” => Q <= “1011”;
      when “10” => Q <= “1101”;
       when “11” => Q <= “1110”;
       when others => null;
   end case;
   end if;
   end process;
   end dientu_az;

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2. #HEROSTARBOYVN

   library IEEE;
   use IEEE.STD_LOGIC_1164.ALL;
   use IEEE.STD_LOGIC_ARITH.ALL;
   use IEEE.STD_LOGIC_UNSIGNED.ALL;

   entity dientu_az is
   port ( I :  in STD_LOGIC_VECTOR(1 downto  0);
   E1, E2 : in STD_LOGIC;
   Q :  out STD_LOGIC_VECTOR(3  downto 0)
   );
   end dientu_az;

   architecture dientu_az of dientu_az is
   begin
   process (I, E1, E2)
   begin
   if (E1=’0′ or E2 = ‘1’) then Q <= “1111”;
   else
   case I is
    when “00” => Q <= “0111”;
     when “01” => Q <= “1011”;
      when “10” => Q <= “1101”;
       when “11” => Q <= “1110”;
       when others => null;
   end case;
   end if;
   end process;
   end dientu_az;

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